Error while compiling a simple parallel job

[srini_ramesh]

Hi,

When i am trieng to complie the simple parallel job it is giving the following error. My job consits of one oracle Enterprise stage as source one transformer and sequential file as target, it is direct mapping from source to target no functions and calculations used in trasformer stage.

##I TFCN 000001 08:34:33(000) <main_program>
Ascential DataStage(tm) Enterprise Edition 7.5
Copyright (c) 2004, 1997-2004 Ascential Software Corporation.
All Rights Reserved


##I TOSH 000002 08:34:33(001) <main_program> orchgeneral: loaded
##I TOSH 000002 08:34:33(002) <main_program> orchsort: loaded
##I TOSH 000002 08:34:33(003) <main_program> orchstats: loaded
##I TFSC 000001 08:34:33(006) <main_program> APT configuration file: /opt/ascential/dsadm/Ascential/DataStage/Configurations/default.apt
##E TBLD 000000 08:34:37(000) <main_program> Error when checking composite operator: Subprocess command failed with exit status 32512
##E TFSR 000019 08:34:37(001) <main_program> Could not check all operators because of previous error(s)
##W TFCP 000000 08:34:37(002) <transform> Error when checking composite operator: The number of reject datasets "0"is less than the number of input datasets "1".
##W TBLD 000000 08:34:37(003) <main_program> Error when checking composite operator: Output from subprocess: sh: /opt/aCC/bin/aCC: not found.

##I TFCP 000008 08:34:37(004) <transform> Error when checking composite operator: /opt/aCC/bin/aCC +Z -O -I/opt/ascential/dsadm/Ascential/DataStage/PXEngine/include -O -c -ext -z +Z /opt/ascential/dsadm/Ascential/DataStage/Projects/USF/RT_BP171.O/V0S1_SA_PAR1_Transformer_1.C -o /opt/ascential/dsadm/Ascential/DataStage/Projects/USF/RT_BP171.O/V0S1_SA_PAR1_Transformer_1.tmp.o
##E TCOS 000029 08:34:37(005) <main_program> Creation of step finished with status = FAILED (SA_PAR1.Transformer_1)

*** Internal Generated Transformer Code follows:
0001: //
0002: // Generated file to implement the V0S1_repos_Transformer_1 transform operator.
0003: //
0004:
0005: // define our input/output link names
0006: inputname 0 DSLink3;
0007: outputname 0 DSLink4;
0008:
0009: initialize {
0010: // define our row rejected variable
0011: int8 RowRejected0;
0012:
0013: // define our null set variable
0014: int8 NullSetVar0;
0015:
0016: }
0017:
0018: mainloop {
0019: // initialise our row rejected variable
0020: RowRejected0 = 1;
0021:
0022: // evaluate columns (no constraints) for link: DSLink4
0023: writerecord 0;
0024: RowRejected0 = 0;
0025: }
0026:
0027: finish {
0028: }
0029:
*** End of Internal Generated Transformer Code

Thanks in advance
Sagar Reddy

[Eric]

You require a Compiler installed on the DataStage Server Machine.